Synopsys, Inc., today announced that it has achieved certification and compliance from multiple standard organizations for a broad range of DesignWare IP on the TSMC 16-nm FinFET Plus (16FF+) process including USB 2.0 and USB 3.0, PCI Express 3.1, HDMI 2.0, MIPI D-PHY and Serial ATA (SATA) IP solutions.
The IP have passed all the required tests for certification and compliance through independent authorized test centers sponsored by USB-IF, PCI-SIG Interoperability Workshops, HDMI Licensing, LLC and SATA-IO standards organizations. By achieving certification of its DesignWare IP, Synopsys gives designers confidence that the IP is interoperable and functions as expected in the TSMC 16FF+ process.
"Synopsys' availability of Certified DesignWare IP on TSMC's 16FF+ process further demonstrates its commitment to providing high-quality IP solutions that help designers speed development of SoCs on TSMC's advanced FinFET processes," said Suk Lee, TSMC senior director, design infrastructure marketing division. "With silicon-proven DesignWare IP for TSMC's 16FF+ process technology, designers can benefit from the performance, power and area advantages of our process while reducing integration risk and delivering differentiated products to the market faster."
"With more than 45 FinFET tapeouts to date, Synopsys makes significant investments in delivering certified and compliant IP to help designers reduce their integration risk," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "The certification of DesignWare IP for USB, PCI Express technology, HDMI, MIPI and SATA on the TSMC 16FF+ process underscores our commitment to providing high quality, interoperable IP that enable designers to meet their schedule goals and achieve first-pass silicon success."
