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New LPDDR4 Verification IP Accelerates Verification Closure for High-Performance Low Power Designs

瀏覽次數:77

Synopsys announced the immediate availability of verification IP (VIP) for LPDDR4. Synopsys VIP for LPDDR4 is based on a 100 percent native SystemVerilog Universal Verification Methodology (UVM) architecture to enable ease of use, ease of integration and performance.

Complete with verification plans, built-in coverage and a protocol-aware memory debug environment, Verdi Protocol Analyzer, Synopsys VIP for LPDDR4 is a complete VIP solution that accelerates verification closure for designers of low power memory controllers and systems on chips (SoCs).

"LPDDR4 is an exciting step forward in technology providing lower power and higher performance, enabling the mobile industry to stay on the leading edge of the performance curve," said Kevin Widmer, vice president of technical marketing at SK hynix.

"The release of Synopsys memory VIP with advanced verification features devised for the LPDDR4 specification enables faster development of products and enables higher-confidence in compliance verification for SoCs and designs with memory interfaces."

Synopsys' 100 percent native SystemVerilog VIP for the JEDEC LPDDR4 memory protocol specification includes transactor and monitor functions to provide a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve rapid verification convergence on LPDDR4-based designs. In addition to providing LPDDR protocol verification, the Synopsys LPDDR4 VIP can be dynamically configured to model any memory vendor component without the need to recompile, enabling SoC teams to rapidly verify the range of components that will be used with their SoCs.

"We have collaborated extensively with leading-edge SoC design teams to address the increasingly demanding process of protocol compliance for on-chip buses, off-chip interfaces and memory," said Debashis Chowdhury, vice president of R&D for the Synopsys Verification Group. "We continue to deliver solutions that enable designers to accelerate their SoC verification closure and decrease time to market. Synopsys LPDDR4 VIP provides SoC teams with the built-in protocol knowledge, features and methodology support to save time, increase design quality and meet project schedules."

稀土棋局下的台灣解方:從供應鏈韌性看關鍵礦物合作新契機
特別企劃半導體

稀土棋局下的台灣解方:從供應鏈韌性看關鍵礦物合作新契機

稀土與關鍵礦物已成全球科技競爭與經濟安全的重要戰略資源。面對供應鏈高度集中與地緣風險升高,台灣如何透過國際合作、技術替代、戰略儲備與城市採礦,建立自主且具韌性的關鍵礦物供應體系?

稀土與關鍵礦物已成全球科技競爭與經濟安全的重要戰略資源。面對供應鏈高度集中與地緣風險升高,台灣如何透過國際合作、技術替代、戰略儲備與城市採礦,建立自主且具韌性的關鍵礦物供應體系?

關鍵字:LPDDR